Dr. Sridevi Alety
BASF-Chemetall, CA, United States
Although SiC has over 200 known polytypes, only a few are commercially available, namely 3C-SiC, 4H-SiC, and 6H-SiC. Currently, 4H-SiC is the most widely used SiC polytype for power device production, due to its superior electrical properties. These properties enable power devices with high breakdown voltages, high power densities, high switching frequencies, improved thermal conductivity, and improved overall device efficiencies. Beyond their use in EV motor control systems & charging stations, 4H-SiC power devices have enabled improved performance in 5G wireless networks, military radar, satellite communications, power inverters for renewable electricity sources, and drones, while at the same time making these devices smaller, lighter, and more robust to environmental conditions like vibration and radiation.
Recent growth in the electric vehicle (EV) automotive segment has created new opportunities for suppliers at every stage of the value chain, and the power device segment is no exception. As SiC substrate and power device manufacturers ramp their production to meet surging global demand, they desperately need solutions to boost capacity and lower processing costs. In order to address this need, SiC substrate manufacturers are moving from batch process (multi wafer) to single wafer process for 150mm (in production) and 200mm wafers (in development). In a single-wafer process, smaller platen sizes allow for higher process pressures and more uniform pressure distribution. With higher pressure comes faster material removal rates, and therefore shorter polishing times. Moreover, in the single-wafer process, any defective or broken wafers can be isolated without damaging other wafers. This transition to single-wafer CMP has driven testing and adoption of new toolsets, pads, and slurries designed specifically for single-wafer processes. Continued innovation in the CMP of 4H-SiC wafers will be critical to improving wafer and device yields as the SiC industry moves to 200mm wafers.
To this end, we developed a novel CMP slurry for polishing 4H-SiC that accelerates the rate of material removal while simultaneously decreasing interfacial temperatures, thereby lowering the process time, and minimizing surface defects and scratches. To achieve this goal, we tested combinations of oxidizers, additives, and abrasives, to achieve a CMP slurry that can obtain material removal rates of ≥10µ/hr, at lower interfacial temperatures than ever demonstrated before, while generates defect free substrates with high yield of single crystal 4H n-type SiC (Si-face).
Wednesday, September 08, 2021
102 Educational Resource Ctr
9:15 am
